Blog

DEEP RESEARCH · CXL/SEMICONDUCTORS

CXL: Next-Generation Data-Center Interconnect and Investment Ecosystem

A full map of HBM versus CXL, technical bottlenecks, the value chain, and likely beneficiaries.

Published: 2025-09-06 · Semiconductor industry analysis · Naver Blog

You are responsible for your own investment decisions. This is research, not a recommendation to buy or sell.

0. Bottom line first

CXL is a key interconnect for easing the memory wall in AI-era data centers. The early market may be opened by memory makers such as Samsung Electronics, SK hynix, and Micron and test-equipment companies such as Neosem and Exicon. Over the longer term, however, more value may migrate to companies designing and controlling CXL switches and fabrics: Marvell, Astera Labs, Fadu, and Panmnesia.

Official fact: The source includes a Gemini-made audio download link: CXL technology MP3

1. HBM and CXL are complements, not substitutes

In an AI server, HBM is ultra-fast dedicated memory placed close to the GPU to maximize bandwidth. CXL is an interface that expands and shares memory at the server and data-center level. HBM handles hot data; CXL handles warm data that is too large for HBM but too slow if left on SSD.

Layered AI-server memoryHot/Warm/Cold data structure from the source
HBMFastest and closest · Hot Data
CXL memoryMid-speed, shared capacity · Warm Data
NVMe SSDLargest and slowest · Cold Data
HBM serves accelerator performance; CXL serves system efficiency and scalability.
CategoryHBMCXL
DefinitionHigh-performance 3D-stacked memory productInterface standard for high-speed data sharing
Main goalMaximize bandwidthExpand capacity and enable memory pooling
ConnectionCo-packaged close to GPU/acceleratorModular connection through server PCIe slots
FlexibilityFixed, not expandable after packagingHigh; can be expanded and shared
Main customersAI chip makers such as Nvidia and AMDCloud/data-center operators such as Google and Microsoft
Main usesUltra-fast memory for AI acceleratorsMemory expansion, memory pooling, resource sharing

2. CXL technology structure and roadmap

Official fact: CXL combines CXL.io, CXL.cache, and CXL.mem over a PCIe physical layer. CXL.io handles discovery, configuration, and I/O; CXL.cache lets devices cache host memory coherently; CXL.mem lets a host access memory attached to a CXL device as if it were local memory.

Type 1

Accelerator

Devices such as SmartNICs that need to cache host memory. Uses CXL.io and CXL.cache.

Type 2

Device with its own memory

GPUs or FPGAs with HBM that can cache host memory and expose their own memory to the host.

Type 3

Memory expansion device

Lets the host access a large DRAM pool and is the key early adoption case.

VersionSource summaryStrategic meaning
CXL 1.0/1.12019-2020, foundational protocol on PCIe 5.0; mostly one host to one device.A point solution for single-server memory expansion.
CXL 2.02020, introduced switching and memory pooling; cited as the version companies such as Samsung are commercializing.First major commercialization inflection point; begins addressing stranded DRAM at server level.
CXL 3.02022, PCIe 6.0 at 64 GT/s, fabric topology, multi-level switching, P2P communication, and coherent sharing across hosts.Expands toward rack/pod-scale composable infrastructure.

3. Market outlook and bottlenecks

Official fact: The source cites Yole Intelligence's forecast that the CXL market could reach $15 billion by 2028, with CXL DRAM modules representing about 80%, or $12 billion.

Interpretation: The bottleneck is not simply producing more memory modules. High-speed signal integrity, controller/switch SoC complexity, software maturity, and production-grade testing and validation all have to mature together.

CXL production value chainFrom silicon to system validation
IP/designOpenedges, Panmnesia
SoC/moduleFadu, Samsung, SK hynix
PCBKorea Circuit
TestingNeosem, Exicon, QRT, Teledyne, Keysight
Commercialization speed depends on the validation ecosystem as much as on memory suppliers.

4. Key companies and roles

CategoryCompaniesMain CXL roleCore technology/productMain customers
CPU/platformIntel, AMDCXL standard/ecosystem expansion and CPU supportXeon and EPYC support for CXL 1.1/2.0Overall server market
Memory modulesSamsung Electronics, SK hynix, MicronDriving the CXL memory-module marketCMM-D, CMM-H/B, CZ120 CXL 2.0 memory expansion moduleHyperscalers, server OEMs
Controller/switch SoCMarvell, Astera Labs, Microchip, Fadu, PanmnesiaCXL controllers, accelerator SoCs, CXL 3.0 switches, IPStructera, Leo, SMC2100, data-center switch chips, ultra-low-latency CXL controllersCloud data centers, AI platforms, system builders
IPSynopsys, Cadence, Rambus, Openedges TechnologyCXL controller/PHY IPSemiconductor design IPFabless firms, IDMs, system semiconductor companies
Test/measurementTeledyne LeCroy, Keysight, Advantest, Neosem, Exicon, QRTR&D validation, production ATE, CXL DRAM testing, reliability evaluationProtocol analyzers, exercisers, production testers, reliability testingChip/system developers, Samsung, SK hynix, foundries
Substrate/PCBKorea CircuitHigh-speed substrates for CXL memory modulesPCBs for high-speed memory modulesSamsung, SK hynix

5. Neosem and Exicon: early enablers

MetricNeosemExicon
CXL 2.0 tester statusSource says it claims first shipment of a production testerCompleted supply of production testers to Samsung
Main customerSamsung ElectronicsSamsung Electronics
MoatEarly-market advantage and CXL 1.1/2.0 specializationTechnical heritage from PCIe-based SSD testers
CXL 3.0 roadmapDeveloping CXL 3.0 test equipmentDeveloping PCIe 6.0/CXL 3.0 testers through a national project

6. Phased investment view

Phase 1

Now to 2026: enablers

Type 3 memory expansion dominates. Memory manufacturers and test-equipment vendors are likely direct beneficiaries.

Phase 2

After 2026: architects

As CXL 3.0 fabrics mature, switch/fabric SoCs and management software can capture more value.

Risk

Concentration and competition

Korea's Samsung-centered ecosystem has speed advantages, but customer concentration and competition with global test/IP firms must be watched.

Sources

Naver original