Blog

DEEP RESEARCH · SEMICONDUCTOR HBM

HBM Cycle and Suppliers: Why the Winners Are Narrower

A note on why investment benefits have shifted from broad front-end scaling to narrow packaging and test bottlenecks.

Published: 2025-07-06 · HBM/supplier cycle · Naver Blog

You are responsible for your own investment decisions. This research is not a recommendation to buy or sell.

0. Bottom line first

Nvidia and SK hynix can keep making highs while many semiconductor suppliers lag because the rules changed. The old game was “who can make it smaller.” The HBM game is “who can stack, connect, and test better.”

This was written after listening to Seonjin-jjang’s Telegram voice chat and organizing the supplier discussion.

1. Investment focus: from front-end to back-end

Past DRAM cycles centered on front-end scaling: moving line width from 20 nm to 10 nm and then below 7 nm with EUV. Lithography, etching, deposition, and many other wafer steps needed new tools and materials, so many suppliers benefited together.

HBM is different. The core is advanced packaging: vertically stacking already-made DRAM dies up to 12 or 16 layers and connecting them with TSVs and thousands of micro-bumps. The investment focus therefore moves from the whole front-end chain to specific back-end bottlenecks.

Semiconductor investment paradigm shiftFrom planar scaling to 3D integration
Past20 nm → 10 nm → below 7 nm
HBM12-high and 16-high stacking
InterconnectTSV and micro-bumps
VerificationKGD, inspection, metrology
Capital shifts from broad front-end spending to narrow, deep back-end bottlenecks.

2. Bottlenecks: packaging and test

Official fact: The source says SK hynix led the market by improving yield and heat dissipation through MR-MUF, while competitors that stayed with traditional TC-NCF struggled with yield.

Official fact: HBM stacks multiple DRAM dies. If one of 12 dies is defective, the entire package including a GPU worth thousands of dollars may have to be discarded. Final yield is multiplicative, making Known Good Die selection critical.

Packaging

MR-MUF, TC bonders, MUF materials

Stacking and bonding quality decides product success.

Inspection

KLA, Onto Innovation, Camtek

They measure TSV depth, bump height, and layer alignment at nanometer precision.

Test

Leeno Industrial, FormFactor

Probe cards must contact thousands of fine HBM I/Os without damage.

3. Value chain: value concentrates in fewer hands

Interpretation: Nvidia as the AI chip winner and SK hynix as the leading HBM supplier capture the largest benefits. Below them, tool and material suppliers for packaging and testing bottlenecks gain bargaining power. General-purpose front-end suppliers receive only limited volume benefit and less direct HBM premium.

The root cause is the memory wall: memory bandwidth cannot keep up with CPU/GPU compute. The answer is not just more DRAM capacity, but a much wider data path between GPU and memory, which is exactly HBM’s role.

4. Next step

If HBM moves beyond 16-high stacks and hybrid bonding arrives, this selection effect can deepen further. The current divergence in supplier stock prices should be read as a structural technology shift, not just a temporary market rotation.

Sources

  • Original post: Naver Blog 223923447133