DEEP RESEARCH · SAMSUNG MEMORY

Samsung Electronics Capex: 2025 Targets for DRAM and NAND

Reading the 2025 legacy memory transition through Pyeongtaek P4 and P1 investment signals

Written: 2024-12-27 · Memory semiconductor capex view · STARFOLIO Naver Blog

0. Bottom line first

This report summarizes the YouTube video below and organizes Samsung’s 2025 DRAM and NAND plans, especially for legacy memory. Source link: https://youtu.be/2LjxltZOgSs?si=jJ_pw5bRoZkGqpJP

1. DRAM: 1α transition is the early-2025 focus

Official fact: In the source, 1α DRAM is described as sixth-generation 10nm-class DRAM. Equipment purchase and installation are under way at Pyeongtaek P4, targeting early-2025 mass production on a one-pass line with monthly capacity of 30,000 wafers.

• The gate width is reduced to about 11nm to improve density and performance.
• It competes with SK hynix’s sixth-generation 10nm-class product.
• Because SK hynix developed ahead, Samsung needs to close the technology gap.
• It is also important as a foundation for HBM4 development.
• The current yield is described as 10~20%, so improvement is needed.

Interpretation: For suppliers, the actual investment scale and timing matter more than the technology label itself. The pace of equipment purchase and installation connects more directly to later earnings.

2. Next-generation DRAM: 1D and 3D DRAM

Official fact: 1D DRAM is in the second one-pass stage, with mass production targeted for the second half of 2026 to early 2027. The source also mentions a plan to accelerate next-generation memory development.

Future technology also includes vertical-structure, GAA-based 3D DRAM. The 1α transition is the near-term mass-production task, while 1D and 3D DRAM are competitiveness tasks for later generations.

3. NAND: 400-layer and V9 286-layer

Official fact: The 400-layer NAND effort targets technology beyond SK hynix’s 321-layer NAND. Maintaining No. 1 position in NAND, reducing cost, and maximizing efficiency are presented as key points.

Interpretation: NAND competition is not only about layer count. Process architecture and cost competitiveness matter together. Successful 400-layer mass production would test both technology leadership and margin defense.

4. Strategic meaning and my memo

Official fact: The source states that Samsung Electronics’ memory semiconductor revenue accounts for 60~70% of total semiconductor division revenue. It also notes that Vice Chairman Jun Young-hyun was appointed directly as head of the memory business to lead technology innovation.

• The goal is to maintain technology leadership in both DRAM and NAND flash.
• Closing the gap with competitor SK hynix is the key task.
• 2025 could become an inflection year for Samsung’s memory technology.
• Whether DRAM and NAND mass production succeeds will be central to future market competitiveness.

In December 2024, I added companies that I thought could grow next year, in the sense of giving them water and fertilizer. The related posts are the KNJ post and the HPSP post.